Jaydeep Kulkarni received a B.E. degree from the University of Pune, India, in 2002, an M. Tech degree from the Indian Institute of Science (IISc) in 2004, and a Ph.D. from Purdue University in 2009. From 2009-2017, he worked as a Research Scientist at Intel Circuit Research Lab in Hillsboro, OR. His research work at Intel has been recognized with seven Divisional Recognition Awards for successfully transferring memory circuit technology research into Intel’s next-generation Microprocessor products. He is a tenured Associate Professor in the Department of Electrical and Computer Engineering and a Fellow of Silicon Labs Endowed Chair in Electrical Engineering at the University of Texas at Austin.
Dr. Kulkarni has filed 38 patents, published two book chapters, and more than 120 papers in refereed journals and conferences. His research focuses on Integrated circuits and systems, specifically machine learning hardware accelerators, in-memory computing, DTCO/STCO for emerging nano-devices, heterogeneous and 3D integrated circuits, hardware security, and cryogenic computing.
Dr. Kulkarni received the Best M. Tech Student award from IISc Bangalore, Intel Foundation Ph.D. fellowship award, Purdue ECE Outstanding Doctoral Dissertation Award, the IEEE Transactions on VLSI Systems Best Paper Award, the SRC Outstanding Industrial Liaison award, Micron Foundation Faculty Awards, Intel Rising Star Faculty Award, NSF CAREER Award, SRC Innovator Award, UT ECE Junior Faculty Excellence in Teaching Award, and IEEE Best Associate Editor Award.
Dr. Kulkarni has participated in technical program committees of the VLSI Symposium, CICC, ASSCC, DAC, ICCAD, ISLPED, AICAS, and VLSI Design conferences. He has served as a Distinguished Industrial Lecturer for the IEEE Circuits and Systems Society and a distinguished IEEE Solid-State Circuits Society lecturer. He has been a TPC Co-Chair and General Co-Chair for 2017 and 2018 ISLPED, respectively, and a TPC Co-Chair for the 2023 VLSI Design Conference, India. He has also been an associate editor for IEEE Solid-State Circuit Letters, IEEE Transactions on VLSI Systems, and IEEE Transactions on Circuits and Systems -II. He currently serves as a distinguished lecturer for the IEEE Electron Device Society. He is a senior IEEE and the US National Academy of Inventors member.
